2PCS HAMGEEK ADRV9009 SDR 70MHz-6GHz Boards with ZYNQ-XCZU15EG & PL 2GB PS 4GB and 8TX 8RX Channels

2PCS HAMGEEK ADRV9009 SDR 70MHz-6GHz Boards with ZYNQ-XCZU15EG & PL 2GB PS 4GB and 8TX 8RX Channels

Description:
The HAMGEEK ADRV9009 is a highly integrated agile radio frequency (RF) transceiver that features dual-channel transmit and receive capabilities, integrated frequency synthesizers, and digital signal processing.

This IC has a diverse combination of high performance and low power consumption to meet the requirements of 3G, 4G and 5G macrocellular time division duplex (TDD) base station applications.

Specifications:
• FPGA: ZYNQ-XCZU15EG-FFVB1156
• RF chip: ADRV9009x4
• Memory: PL 2GB and PS 4GB
• Interface: 1G-ETH/SD-CARD/UART/SFP
• SMA: 8TX and 8RX
• Hardware frequency range: 70MHz-6GHz
• Signal bandwidth: 200M for receiving and 450M for transmitting

1. Core Chip Requirements for the PCB:
• FPGA: ZU15EG, DDR4 (PS), DDR4 (PL), QSPI boot (128MB);
• Transceiver Chips: 4*ADRV9009;
• DAC Chip: 1*9747.

2. Functional and Performance Requirements:
• Supports 200 MHz bandwidth receiving mode;
• Supports 450 MHz bandwidth transmitting mode;
• Hardware supports GPIO control for ADRV9009-FHM functionality;
• Optional OCXO (10 MHz) or TCXO (30.72 MHz), selectable via soldering;
• Onboard optical fiber interface;
• Onboard EMMC (4G).

3. Interface Requirements:
• Power supply requirements: A wide voltage design of 9-12V is needed (with reverse polarity protection);
• External general-purpose I/O interfaces should have isolation protection;
• External interfaces should be placed as close to the edge of the PCB as possible for easy installation and use.

4. Software Requirements (Providing MPSOC Program):
• Enable FPGA loading (QSPI);
• Enable ADRV9009 transceiver functionality;
• Enable AD9747 transmission functionality;
• Enable Ethernet functionality;
• Enable DDR4 reading/writing (PS/PL);
• Enable SD card file transfer to PL side DDR4, and 9009 continuous waveform playback.

5. PCB Specifications:
• Power input range: -50 dBm to -10 dBm;
• Channel isolation: >45 dBc;
• 200 MHz in-band fluctuation: <±2 dB;
• Receiver spurious-free dynamic range (SFDR): >50 dBc;
• ADC effective bit count: >8.5 Bits;
• Maximum transmission power: At least -15 dBm for frequencies above 5G; at least 0 dBm for frequencies below 3G.

6. Interface Definition:
• External interfaces: J30J-31J (including RS232 debugging serial port, RS485, 1000M Ethernet, RS422, power supply, etc. The specific details will be based on the results of both parties' agreement);
• Debug interface: Designed with 2.54mm pitch pin header;
• RF interface: SMP (using hole-punch design);
• FPGA-IO expansion: Designed with 24*2 dual-row pin header, with a preferred small pitch of 2.54mm as per Party A's requirements.

Package Included:
• 2 x HAMGEEK ADRV9009 SDR Boards

Packaging Details:
• Weight: 2kg

Note:
- The boards are custom products with a minimum order of 2 pieces and a production time of 15 days.