• ZYNQ7020 FPGA Minimum System Development Board Support for PYNQ Mirror Image Operation
  • ZYNQ7020 FPGA Minimum System Development Board Support for PYNQ Mirror Image Operation
  • ZYNQ7020 FPGA Minimum System Development Board Support for PYNQ Mirror Image Operation

ZYNQ7020 FPGA Minimum System Development Board Support for PYNQ Mirror Image Operation

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  • Price:$136.74
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ZYNQ7020 FPGA Minimum System Development Board Support for PYNQ Mirror Image Operation

Note:
- Due to different usage scenarios, we no longer provide soldering services for pin headers. Pin headers have already been shipped with the motherboard (you can decide whether to solder them up or down according to your own usage scenario)
- There is no need to port it, you can run it directly using the official PYNQ mirror image.


Specification:
- Main chip: ZYNQ XC7Z020-CLG400 (the first 100 sets use XA7Z020 vehicle level)
- Main board layer: 8 layers (gold sinking process)
- DDR memory: 256M x 16bit (512MB)
- FLASH: 128Mbits (16MB) (connected to the PS terminal for system startup)
- TF slot: microSD slot (TF card slot, can be used for system boot)
- Clock:
  PS end: 50M active crystal
  PL end: 125M active crystal
- Network: one Gigabit Ethernet (for PS terminal) RTL8211F
- HDMI-compatible: one HDMI-compatible receiver (input), one HDMI-compatible source port (output)
- JTAG: the board integrates some functions for xilinx jtag downloader (onboard)
- USB: the board comes with a USB2.0 PHY, which can be used as a USB HOST or USB SLAVE
- Serial port: with one USB-UART, connected to PS terminal (and JTAG downloader share the same TYPE C port)
- Audio input: microphone with PDM interface (onboard)
- Audio output: PWM driven dual-channel audio output with 3.5mm audio connector
- Keys: 4 keys (programmable) + 1 POR hardware reset button
- LED: 4 LED (green) + 2 RGB LED (color)
- Dip switch: dual dip switch (programmable) + dual DIP switch (responsible for starting mode selection)
- Analog IO: six single-ended (0-3.3V) analog inputs to the chip XADC, and one differential analog input (0-1.0V) to the XADC
- Logic IO: a total of 68 FPGA-IOs are extracted, of which 32 pairs (a total of 64 IOs) are extracted in differential mode (isometric treatment in the difference line), and two IOs can be used as I2C (with 2.2K pull-up resistor).
- Power supply: the main board can supply power through the TYPE C port (JTAG or USB SLAVE), or use the adapter board to supply 5V power to the VCC pins of the main board through the row pins.

Package Included:
- 1 x Development Board


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