• ALTERA EP2C8Q208 FPGA Nios II Core Board Development Board Learning Board
  • ALTERA EP2C8Q208 FPGA Nios II Core Board Development Board Learning Board

ALTERA EP2C8Q208 FPGA Nios II Core Board Development Board Learning Board

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ALTERA EP2C8Q208 FPGA Nios II Core Board Development Board Learning Board

Descriptions: 
- Use double Layers PCB design, with professional circuit board flying probe test, stable and reliable, and the power supply and PLL all through the part PI type filter, Use high cost tantalum capacitance do the power filter! Performance is stable and reliable, with good structure, Support FPGA/NIOS II development, all the pins are directly lead out from the board , and easy to use, obligate PLL resources.

Specfication:
- On-board EP2C8Q208C8-the FPGA core chips;
- On-board SDRAM-K4S641632-UC60 Or HY57V641620FTP-7, paragraph two SDRAM compatible, capacity of 64 Mbit,
- 50 MHz active crysta
- 5 v power input interface
- The power switch
- R_C buttons
-  Rst key, can treat as the user input buttons, also can use the reset button for system;
- IN5822 diodes prevent power reverse connect, high-speed schottky diodes;
- The powerstatus light D2 ;
- 25 x2 double row . 2.54 mm user interface;
- A user LED D4. pins is independent to interface board
- Download status light D1 will light when downloading
- JTAG download interface
- ASP download interface, corresponding to the download file is relatively POF, speed is slower than JTAG, and needs to be repower to work, operation is troublesome so not recommended for beginner use
- 4 wire RS232 serial interface communication interface and SRAM jump line of choice; When connected with interface board, change pins and reuse;
- 25 x2 double row and 2.54 mm user interface;
- Screw the brass pillars support;
- 1085-3.3 v voltage chip;
- 1117-1.2 v voltage chip, provide the power;
- SRAM chips IS61LV25616AL 256 kx16b, ( optional);
- AT24C02-the I2C storage device;
- With chip EPCS4 (4 Mb )
Package include:
- 1 x FPGA EP2C8Q208 core board

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