Terasic DE1-SOC Development Board Cyclone V Terasic DE1 SoC Board Designed with 5CSEMA5F31C6 Device

Terasic DE1-SOC Development Board Cyclone V Terasic DE1 SoC Board Designed with 5CSEMA5F31C6 Device

Description:
The DE1-SoC Development Kit presents a robust hardware design platform built around the System-on-Chip (SoC) FPGA for Altera, which combines the latest dual-core Cortex-A9 embedded cores with industry-leading programmable logic for ultimate design flexibility. Users can now leverage the power of tremendous re-configurability paired with a high-performance, low-power processor system. The SoC for Altera integrates a hard processor system (HPS) (on the base for ARM) consisting of processor, peripherals and memory interfaces tied seamlessly with the FPGA fabric using a high-bandwidth interconnect backbone. The DE1-SoC development board includes hardware such as high-speed DDR3 memory, video and audio capabilities, Ethernet networking, and much more.

The DE1-SOC Development Kit contains all components needed to use the board in conjunction with a computer that runs the system for Microsoft Windows XP or later ( 64-bit OS and Quartus II 64-bit are required to compile projects for DE1-SoC).

Component Solutions for Intel FPGAs:
* Power, ADC, Video, Accelerometer and Reset Generator Solution for ADI
* Memory Solution for ISSI
* Clock Solution for Skyworks
* Ethernet Solution for Microchip
* Capacitive Component Solution for Panasonic

Specifications:
The DE1-SoC board has many features that allow users to implement a wide range of designed circuits, from simple circuits to various multimedia projects.

The following hardware is provided on the board:
1. FPGA Device
* Cyclone V SoC 5CSEMA5F31C6 Device
* Dual-core Cortex-A9 (HPS) for ARM
* 85K Programmable Logic Elements
* 4,450 Kbits embedded memory
* 6 Fractional PLLs
* 2 Hard Memory Controllers

2. Configuration and Debug
* Serial Configuration device – EPCS128 on FPGA
* On-Board USB Blaster II (Normal type B USB connector)

3. Memory Device
* 64MB (32Mx16) SDRAM on FPGA
* 1GB (2x256Mx16) DDR3 SDRAM on HPS
* Micro SD Card Socket on HPS

4. Communication
* Two USB 2.0 Host Ports (ULPI interface with USB type A connector) on HPS
* UART to USB (USB Mini B connector)
* 10/100/1000 Ethernet
* PS/2 mouse/keyboard
* IR Emitter/Receiver

5. Connectors
* Two 40-pin Expansion Headers (voltage levels: 3.3V)
* One 10-pin ADC Input Header
* One LTC connector (One Serial Peripheral Interface (SPI) Master ,one I2C and one GPIO interface )

6. Display
* 24-bit VGA DAC

7. Audio
* 24-bit CODEC, Line-in, line-out, and microphone-in jacks

8. Video Input
* TV Decoder (NTSC/PAL/SECAM) and TV-in connector

9. ADC
* Sample rate: 500 KSPS
* Channel number: 8
* Resolution: 12 bits
* Analog input range : 0 ~ 4.096 V

10. Switches, Buttons and Indicators
* 4 User Keys (FPGA x4)
* 10 User switches (FPGA x10)
* 11 User LEDs (FPGA x10 ; HPS x 1)
* 2 HPS Reset Buttons (HPS_RST_n and HPS_WARM_RST_n)
* Six 7-segment displays

11. Sensors
* G-Sensor on HPS

12. Power
* 12V DC input

Packing List:
* 1 x DE1-SoC Development Board
* 1 x DE1-SoC Quick Start Guide
* 1 x Type A to B USB Cable
* 1 x Type A to Mini-B USB Cable
* 1 x 12V DC Power Supply
    
Packaging Details:
* Weight: 0.5kg