• Bus Blaster V3c for MIPS Kit OpenOCD urJTAG JTAG Debugger Adapter
  • Bus Blaster V3c for MIPS Kit OpenOCD urJTAG JTAG Debugger Adapter
  • Bus Blaster V3c for MIPS Kit OpenOCD urJTAG JTAG Debugger Adapter
  • Bus Blaster V3c for MIPS Kit OpenOCD urJTAG JTAG Debugger Adapter
  • Bus Blaster V3c for MIPS Kit OpenOCD urJTAG JTAG Debugger Adapter
  • Bus Blaster V3c for MIPS Kit OpenOCD urJTAG JTAG Debugger Adapter

Bus Blaster V3c for MIPS Kit OpenOCD urJTAG JTAG Debugger Adapter

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Bus Blaster V3c for MIPS Kit OpenOCD urJTAG JTAG Debugger Adapter

Description:

Bus Blaster V3c for MIPS is an economical, yet high-speed debug adapter designed for supporting JTAG debug with various MIPS processors. This version of the Bus Blaster has a 14-pin target connector and interface cable with buffering logic suitable for MIPS EJTAG targets. In other respects it is the same as the standard Bus Blaster V3c

For MIPS hardware and software debugging, Bus Blaster is recommended to be used with OpenOCD JTAG programming and debugging software which can be downloaded from SourceForge.

For software development, compiling, building programs, and source debugging with GDB, the Codescape MIPS SDK Essentials is a free download available from the Imagination Technologies website. Download Codescape SDK Essentials here.

Bus Blaster can be used with various other debugging, programming and boundary scan test software, so there are a rich variety of resources available for your MIPS development project.

Features:
- Designed for MIPS (EJTAG) targets with 14 pin connector
- Also compatible with adapters for 14-pin to 12-pin and 6-pin connectors for use with Digilent Nexys 4 DDR and Wi-Fire target boards
- Including Bus Blaster acrylic case panels and nylon screws (assembly required)
- Based on FT2232H chip with high-speed USB 2.0
- Buffered interface works with 3.3 volt to 1.8 volt targets
- Reprogrammable buffer is compatible with multiple debuggers
- Compatible with 'jtagkey', 'KT-link' programmer settings in OpenOCD, urJTAG, and more
- Ships with JTAGkey compatible buffer image pre-programmed
- Mini-CPLD development board: self-programmable, extra CPLD pins to header
- Open source (CC-BY-SA)

Package Included:
- Bus Blaster V3c Development Board
- 1 x Schematic Diagram
- 1 x Chip Datasheet
- 1 x Official Material

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