Terasic DE25-Nano FPGA Development and Education Board A5EB013BB23BE4SCS 138K Logic Elements for Agilex 5

Introduction:
- Building upon the widespread adoption of the DE10-Nano, the DE25-Nano upgrades nearly every dimension: from a 138K-LE FPGA, onboard 2GB LPDDR4, and USB-Blaster III, to an enhanced dual-cluster ARM Cortex-A76/A55 HPS architecture - all while maintaining the same compact form factor. Whether you're developing AI models, vision pipelines, or control systems, the DE25-Nano offers a modern hardware foundation for real-time processing at the edge.

- What truly sets the DE25-Nano apart is its versatile I/O and production-ready architecture - with support for HDMI-compatible, MIPI, ADC, GPIO, and shared HPS/FPGA memory. This makes it not only a powerful dev kit for rapid prototyping, but also a reliable hardware platform ready to be adopted in real-world applications - from embedded vision, robotics to signal processing and edge analytics. Paired with rich ecosystem of daughter cards for Terasic, the DE25-Nano enables fast iteration and scalable deployment across industries - bridging the gap between development and production, education and enterprise.

DE25-Nano:
- FPGA: A5EB013BB23BE4SCS (138K Logic Elements)
- Dimensions: 106.9 mm x 68.58mm
- Onboard Programmer: USB-Blaster III via USB Type-C connector
- Configuration Mode: Supports ASx4 mode with 128Mbit QSPI Flash
- Cooling Solution: Active heatsink

FPGA Side:
- LPDDR4: 1GB LPDDR4 with 32-bit data bus. Data Rate: 2666 MT/s (Rev. B) / 2133 MT/s (Rev. A)
- SDRAM: 128MB SDRAM with 16-bit data bus
- HDMI-compatible Output: Supports up to 1080p resolution
- Camera Interface: One MIPI connector with 2 data lanes
- ADC: 8-channel ADC with 2x5 header
- GPIO Headers: Two 3.3V 2x20 DE-GPIO headers
- User Interface: 8 user LEDs, 2 buttons, 4 slide switches
- UART Port: 2-pin UART via Type-C connector
- Thermal Management: Integrated temperature sensor and fan controller

HPS Side:
- Micro SD Socket
- LPDDR4 Memory: 1 GB LPDDR4 with 32-bit data bus (shared with FPGA). Data Rate: 2133 MT/s.
- Ethernet: Gigabit Ethernet PHY with RJ45 port
- USB Port: One USB 2.0 port via Type-C connector
- UART Interface: UART to USB via Type-C connector
- Sensor: Integrated accelerometer
- User Interface: 1 LED, 1 button, and 1 cold reset button

Software Support:
- For FPGA Example Code
- For Linux BSP

Package Included:
- 1 x DE25-Nano Board
- 1 x Acrylic (Installed)
- 1 x Active Heatsink (Installed)
- 1 x 5V/4A Power Supply
- 1 x USB Type-C Cable
- 1 x Micro SD Card (Installed)
- 1 x Quick Start Guide